This disclosure relates generally to the field of mainframe software management. More particularly, but not by way of limitation, this disclosure refers to a method of redirecting SRB code from an otherwise zIIP in-eligible process such that the process may execute properly on the zIIP processor without incurring additional cost imposed by licensing agreements with International Business Machines Corp. (IBM) of Armonk N.Y. and/or other third party software vendors.
Referring now to FIG. 1, a high level block diagram of an IBM z series mainframe computer 100 is shown. The mainframe computer 100 consists of memory 110, a processor frame 115, a plurality of General Processors (GPs) 120, a plurality of System z Integrated Information Processors (zIIPs) 125, a channel unit 130 for processing Input/Output (I/O) requests, a connection to another mainframe 135 (which may be a network interface or some other communication link such as a communication buss), a tape storage unit 140, a telecommunications link 145 and a disk storage device 150 sometimes referred to as Direct Access Storage Device (DASD).
A single physical mainframe 100 may also be subdivided into multiple Logical Partitions (LPARs). A LPAR is a logical segmentation of a mainframe's memory and other resources that allows it to run its own copy of an operating system and associated applications. LPAR's may be enabled via special hardware circuits or purely through software. LPAR's may also allow multiple system images (of the same operating system or different operating systems) to run in one machine. Furthermore, each LPAR can execute one or more subsystems within an operating system. A subsystem is a service provider that performs one or more functions, but does nothing until it is requested. Examples of mainframe subsystems include Customer Information Control System (CICS), Information Management System (IMS), Resource Access Control Facility (RACF). When an LPAR is configured a system administrator may designate which physical hardware resources are available, either in whole or in part, to that particular LPAR.
In IBM System z9 and successor mainframes, the System z Integrated Information Processor (zIIP) is a special purpose processor intended to offload the General Processor (GP) of the mainframe computer system. These processors apparently do not contain microcode or hardware features that accelerate their designated workload. Instead, they are financially different in that they permit increasing system capacity for targeted workloads without raising z/OS and/or third party software license fees as would be the case if this workload was performed by the GP.
In order for a process to exploit the zIIP it must be specially coded. In addition to IBM certain third party software vendors (ISVs) have introduced support for execution of their products on the zIIP. The details of this are known to those of ordinary skill in the art and are not the topic of this disclosure.
Given these and other shortcomings, along with a potential financial benefit of utilizing the zIIP more generally, a method and system for implementing more general availability of the zIIP is disclosed. Furthermore, typical multi processing computers only include a plurality of a single type of processing unit or very different processing units. Therefore, software developers faced with not only technical but financial considerations may benefit from the embodiments disclosed herein.